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MK68564 데이터시트(PDF) 37 Page - STMicroelectronics

부품명 MK68564
상세설명  SERIAL INPUT OUTPUT
PDF  46 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

MK68564 데이터시트(HTML) 37 Page - STMicroelectronics

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AC ELECTRICAL CHARACTERISTICS
(VCC = 5.0 VDC ± 5%, GND = 0 VDC, TA = 0 to 70°C)
4. 0 M H z
5. 0 MH z
Number
Parameter
Min.
Max.
Min.
Max.
Unit
Notes
1
CLK Period
250
1000
200
1000
ns
2
CLK Width High
105
80
ns
3
CLK Width Low
105
80
ns
4
CLK Fall Time
30
30
ns
5
CLK Rise Time
30
30
ns
6
CS Low to CLK High (setup time)
0
0
ns
1
7
A1-A5 Valid to CS Low (setup time)
0
0
ns
8
DATA Valid to CS Low (write cycle)
0
0
ns
9
CS Width High
50
50
ns
1
10
DTACK Low to A1-A5 Invalid (hold time)
0
0
ns
11
DTACK Low to DATA Invalid
(write cycle hold time)
00
ns
12
CS High to DTACK High (delay)
55
50
ns
13
CLK High to DTACK Low
320
295
ns
14
R/W Valid to CS Low (setup time)
0
0
ns
15
DTACK Low to R/W Invalid (hold time)
0
0
ns
16
CLK Low to DATA Out
450
450
ns
17
CS High to DATA Out Invalid (hold time)
0
0
ns
11
18
CS High to DTACK High Impedance
105
100
ns
19
DTACK Low to CS High
0
0
ns
20
DATA Valid to DTACK Low
70
70
ns
21
IACK Width High
50
50
ns
1
22
IACK Low to CLK High (setup time)
0
0
ns
1
23
CLK Low to INTR Disabled
410
410
ns
2
24
CLK Low to DATA Out
330
330
ns
2
25
DTACK Low to IACK, IEI, High
0
0
ns
26
IACK High to DTACK High
55
50
ns
27
IACK High to DTACK High Impedence
105
100
ns
28
IACK High to DATA Out Invalid (hold time)
0
0
ns
29
DATA Valid to DTACK Low
195
195
ns
2
30
CLK Low to IEO Low
220
220
ns
3
31
IEI Low to IEO Low
140
140
ns
3
32
IEI High to IEO High
190
190
ns
4
33
IACK High to IEO High
190
190
ns
4
34
IACK High to INTR Low
200
200
ns
5
35
IEI Low to CLK Low (setup time)
10
10
ns
36
IEI Low to INTR Disabled
425
425
ns
6
37
IEI Low to DATA Out Valid
225
225
ns
6
38
DATA Out Valid to DTACK Low
55
55
ns
6
39
IACK High to DATA Out High Impedence
120
90
ns
MK68564
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