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RC19302A00AGNT#KD0 데이터시트(PDF) 30 Page - Renesas Technology Corp |
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RC19302A00AGNT#KD0 데이터시트(HTML) 30 Page - Renesas Technology Corp |
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30 / 58 page ![]() R31DS0210EU0106 Rev.1.06 Page 30 May 11, 2026 RC193xx Datasheet 3. Test Loads Figure 10. AC/DC Test Load for Differential Outputs (Standard PCIe Source-Terminated) Figure 11. AC/DC Test Load for Differential Outputs (Double-Terminated or Receiver-Terminated) Table 28. Parameters for AC/DC Test Load (Standard PCIe Source-Terminated) Clock Source L (cm) CL (pF) ZOUTSEL_tri pin Zo (ohms) Rs (ohms) SMA100B 25.4 2 0 (85 ohms) 85 Internal 1 (100 ohms) 100 Internal Mid (34 ohms) 85 External 25.5 100 External 33.3 Table 29. Parameters for AC/DC Test Load (Double-Terminated) Clock Source L (cm) CL (pF) ZOUTSEL_tri pin Zo (ohms) Rs (ohms) SMA100B 25.4 2 0 (85 ohms) 85 Internal 1 (100 ohms) 100 Internal Mid (34 ohms) 85 None[1] 1. This setting is designed to provide additional amplitude for receiver-terminated loads by turning off the source termination in the output driver. There is no reflection with receiver terminated loads since the receiver termination absorbs the incident waveform. 100 DUT Board CKIN+ CK+ DUT Chip CKIN- CK- Zo (differential) Rs Rs CL CL CK+ Clock Source CK- DSO Probes SMA DUT Board CKIN+ CK+ DUT Chip CKIN- CK- Zo (differential) Rs Rs CL CL CK+ Clock Source CK- SMA SMA DSO 50 50 |
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