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LP1071 데이터시트(PDF) 10 Page - Freescale Semiconductor, Inc |
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LP1071 데이터시트(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 32 page ![]() LP1071 Advance Information, Rev. 0.5 10 Freescale Semiconductor PRELIMINARY LP1071 Interfaces 4 LP1071 Interfaces 4.1 SDIO Host Interface The LP1071 supports SDIO Card Specifications, Version 1.00 (http://www.sdcard.org). The LP1071 SDIO host interface supports the I/O mode of the SD Card Specifications. 4.1.1 SDIO Supported Features The features supported by the LP1071 SDIO host interface are: • SD 1-Bit Mode • SD 4-Bit Mode • Low Speed • Full Speed (25 MHz) • Interrupt • CMD52 during Data Transfer • CMD53 Multi Block Transfer • Interrupt during 4-bit Multiple Block Data Transfer • Combo Card (I/O mode only) 4.1.2 SDIO Function 0/1 For Function 0 registers descriptions, refer to SDIO Card Specification. For Function 1, the SDIO registers occupy a 128 Kbyte space as defined in the SDIO specification. Figure 2 illustrates SDIO Function 1 128 Kbyte Memory Map and Table 8 details its registers. ENOB Fin= 1MHz — 7.2 — bit Wake-up time From Shutdown From Standby — — — — 10 2 µs µs 1 Due to saturation of the output buffer, INL and DNL are not applicable for output voltages below 200 mV. Output is monotonic above 0.1 V. Table 7. Aux DAC Specifications (continued) Parameter Condition Min Typ Max Units |
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