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PARAMETER MEASUREMENT INFORMATION

t

h

t

su

From Output

Under Test

C

(see Note A)

L

LOAD CIRCUIT

S1

V

LOAD

Open

GND

R

L

Data Input

Timing Input

0 V

0 V

0 V

t

W

Input

0 V

Input

Output

Waveform 1

S1 at V

(see Note B)

LOAD

Output

Waveform 2

S1 at GND

(see Note B)

V

OL

V

OH

0 V

≈0 V

Output

Output

TEST

S1

Output

Control

V

M

V

M

V

M

V

M

V

M

1.8 V

0.15 V

±

2.5 V

0.2 V

±

3.3 V

0.3 V

±

5 V

0.5 V

±

1 k

Ω

500

Ω

500

Ω

500

Ω

V

CC

R

L

2 × V

CC

2 × V

CC

6 V

2 × V

CC

V

LOAD

C

L

30 pF

30 pF

50 pF

50 pF

0.15 V

0.15 V

0.3 V

0.3 V

3 V

V

I

V

V

1.5 V

V

V

M

≤2 ns

≤2 ns

≤2.5 ns

≤2.5 ns

INPUTS

R

L

t /t

r

f

V

CC

V

CC

V

CC

t

(see Notes E and F)

PZL

V

LOAD

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

NOTES: A. C includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators have the following characteristics: PRR

10 MHz, Z = 50

.

D. The outputs are measured one at a time, with one transition per measurement.

L

O

≤

Ω

E. Because this device has open-drain outputs, t

and t

are the same as t .

F. t

is measured at V .

G. t

is measured at V

+ V .

H. All parameters and waveforms are not applicable to all devices.

PLZ

PZL

PD

PZL

M

PLZ

OL

∆

VOLTAGE WAVEFORMS

PULSE DURATION

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

V

I

V

I

V

I

V

M

V

M

V

/2

LOAD

t

PZL

t

PLZ

t

PHZ

t

PZH

V

– V

OH

∆

V

+ V

OL

∆

V

M

V

M

V

M

V

M

V

OL

V

OH

V

I

V

I

V

OH

V

OL

V

M

V

M

V

M

V

M

t

PLH

t

PHL

t

PLH

t

PHL

t

(see Notes E and G)

PLZ

V

LOAD

t

/t

PHZ

PZH

V

LOAD

SN74LVC2G07

DUAL BUFFER/DRIVER

WITH OPEN-DRAIN OUTPUTS

SCES308G – AUGUST 2001 – REVISED JANUARY 2007

(OPEN DRAIN)

Figure 1. Load Circuit and Voltage Waveforms

5

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