TDA7563B

22/33

7.2.4

Acknowledge

The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock

pulse (see Figure 31). The receiver** the acknowledges has to pull-down (LOW) the SDA

line during the acknowledge clock pulse, so that the SDAline is stable LOW during this clock

pulse.

* Transmitter

–master (

μP) when it writes an address to the TDA7563B

–

slave (TDA7563B) when the

μP reads a data byte from TDA7563B

** Receiver

–

slave (TDA7563B) when the

μP writes an address to the TDA7563B

–

master (µP) when it reads a data byte from TDA7563B

SDA

SCL

DATA LINE

STABLE, DATA

VALID

CHANGE

DATA

ALLOWED

D99AU1031

SCL

SDA

START

STOP

D99AU1032

SCL

1

MSB

23789

SDA

START

ACKNOWLEDGMENT

FROM RECEIVER

D99AU1033