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CP7032M7680LABK 데이터시트(PDF) 2 Page - CTS Corporation

부품명 CP7032M7680LABK
상세설명  5x3.2mm and 7x5mm Low Cost Programmable Clock Oscillator
PDF  4 Pages
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제조업체  CTS [CTS Corporation]
홈페이지  http://www.ctscorp.com
Logo CTS - CTS Corporation

CP7032M7680LABK 데이터시트(HTML) 2 Page - CTS Corporation

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Document No. 008-0321-0
Page 2 - 4
Rev. B
٠ ٠ ٠ CTS Electronic Components, Inc. ٠ 171 Covington Drive ٠ Bloomingdale, IL 60108 ٠ ٠ ٠
Model CP5 and CP7
5x3.2mm and 7x5mm Low Cost
Programmable Clock Oscillator
ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNIT
Maximum Supply Voltage
VCC
-
-0.5
-
4.6
V
Storage Temperature
TSTG
-
-55
-
125
°C
Frequency Range
fO
-
2
-
200
MHz
Frequency Stability
(See Note 1 and Ordering Information)
Operating Temperature
Commercial
-20
70
Industrial
-40
85
Data Retention
-
@ 85°C
10
-
-
Years
Supply Voltage
(see Note 2)
2.25
2.5
2.75
2.97
3.3
3.63
Supply Current
ICC
@ CL = 15 pF
-
-40
mA
Output Load
CL
--
-
15
pF
Output Voltage Levels
Logic '1' Level
VOH
CMOS Load
IOH = -4mA
0.1VCC
--
Logic '0' Level
VOL
CMOS Load
IOL = +4mA
--
0.9VCC
Output Duty Cycle
SYM
@ 50% Level
45
-
55
%
Rise and Fall Time
TR, TF
@ 20% - 80% Levels
-
2.5
4
ns
Start Up Time
TS
Application of VCC
--
10
ms
Enable Function
Enable Input Voltage
VIH
Pin 1 Logic '1', Output Enabled
0.7VCC
--
Disable Input Voltage
VIL
Pin 1 Logic '0', Output Disabled
-
-
0.2VCC
Standby Current
IST
Pin 1 Logic '0', Output Disabled
-
-
10
uA
Enable Start Up Time
TPLZ
Pin 1 Logic '1', Output Enabled
-
-
10
ms
Jitter (peak - peak)
JP-P
10k hits & 0.1uF bypass capacitor
-
100
250
ps
Phase Jitter
tjms
Bandwidth 12 kHz - 20 MHz
-
2.5
-
ps RMS
Notes:
1.
2. Power supply start-up time should be greater than 150 us (0%VCC to 90%VCC).
Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and first year aging at an average
operating temperature of +40 °C.
-50
V
TA
-°C
25
∆f/fO
VCC
± 10 %
V
V
± ppm
-
-
CMOS/TTL OUTPUT WAVEFORM
PERIOD (T)
90%, 80%, 2.4V
50%, 1.5V
10%, 20%, 0.5V
DUTY CYCLE = t/T x 100 (%)
V
V
OH
OL
Tr
Tf
UPTIME (t)
TEST CIRCUIT, CMOS LOAD
POWER
SUPPLY
+
-
+-
-
+
VM
mA
.01uF
D.U.T.
43
12
C L
Including probe
capacitance.
Enable Input
ENABLE TRUTH TABLE
PIN 1
PIN 3
Logic ‘1’
Output
Open
Output
Logic ‘0’
High Imp.
D.U.T. PIN ASSIGNMENTS
PIN
SYMBOL
DESCRIPTION
1
EOH
Enable Input (Standby)
2
GND
Circuit & Package Ground
3
Output
RF Output
4
VCC
Supply Voltage



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