74HC_HCT174

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© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 4 — 12 May 2016

7 of 17

NXP Semiconductors

74HC174; 74HCT174

Hex D-type flip-flop with reset; positive-edge trigger

tPHL

HIGH to LOW

propagation

delay

MR to Qn; see Figure 7

VCC = 2.0 V

-

44

150

-

190

-

225

ns

VCC = 4.5 V

-

16

30

-

38

-

45

ns

VCC = 5.0 V; CL =15pF

-

13

-

-

-

-

-

ns

VCC = 6.0 V

-

13

26

-

33

-

38

ns

tt

transition time

Qn output; see Figure 6

[2]

VCC = 2.0 V

-

19

75

-

95

-

110

ns

VCC = 4.5 V

-

7

15

-

19

-

22

ns

VCC = 6.0 V

-

6

13

-

16

-

19

ns

tW

pulse width

CP input HIGH or LOW;

see Figure 6

VCC = 2.0 V

80

17

-

100

-

120

-

ns

VCC = 4.5 V

16

6

-

20

-

24

-

ns

VCC = 6.0 V

14

5

-

17

-

20

-

ns

MR input LOW;

see Figure 7

VCC = 2.0 V

80

12

-

100

-

120

-

ns

VCC = 4.5 V

16

4

-

20

-

24

-

ns

VCC = 6.0 V

14

3

-

17

-

20

-

ns

trec

recovery time

MR to CP; see Figure 7

VCC = 2.0 V

5

11

-

5

-

5

-

ns

VCC = 4.5 V

5

4-

5

-

5

-

ns

VCC = 6.0 V

5

3-

5

-

5

-

ns

tsu

set-up time

Dn to CP; see Figure 6

VCC = 2.0 V

60

6

-

75

-

90

-

ns

VCC = 4.5 V

12

2

-

15

-

18

-

ns

VCC = 6.0 V

10

2

-

13

-

15

-

ns

th

hold time

Dn to CP; see Figure 6

VCC = 2.0 V

3

6-

3

-

3

-

ns

VCC = 4.5 V

3

2-

3

-

3

-

ns

VCC = 6.0 V

3

2-

3

-

3

-

ns

fmax

maximum

frequency

CP input; see Figure 6

VCC = 2.0 V

6

30

-

5

-

4

-

MHz

VCC = 4.5 V

30

90

-

24

-

20

-

MHz

VCC = 6.0 V

35

107

-

28

-

24

-

MHz

VCC = 5.0 V; CL =15pF

-

99

-

-

-

-

-

MHz

CPD

power

dissipation

capacitance

per package;

VI =GND to VCC

[3]

-17-

-

-

-

-

pF

Table 7.

Dynamic characteristics …continued

GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8

Symbol Parameter

Conditions

25

C

40 C to +85 C 40 C to +125 C Unit

Min

Typ

Max

Min

Max

Min

Max