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74LVC1G02GS 데이터시트(PDF) 2 Page - Nexperia B.V. All rights reserved |
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74LVC1G02GS 데이터시트(HTML) 2 Page - Nexperia B.V. All rights reserved |
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2 / 19 page ![]() 74LVC1G02 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 12 — 29 November 2016 2 of 19 NXP Semiconductors 74LVC1G02 Single 2-input NOR gate 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G02GW 40 Cto +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 74LVC1G02GV 40 Cto +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 74LVC1G02GM 40 Cto +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm SOT886 74LVC1G02GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1 0.5 mm SOT891 74LVC1G02GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9 1.0 0.35 mm SOT1115 74LVC1G02GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0 1.0 0.35 mm SOT1202 74LVC1G02GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 0.8 0.35 mm SOT1226 Table 2. Marking Type number Marking code[1] 74LVC1G02GW VB 74LVC1G02GV V02 74LVC1G02GM VB 74LVC1G02GF VB 74LVC1G02GN VB 74LVC1G02GS VB 74LVC1G02GX VB Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram |
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