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74LVC86A

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Product data sheet

Rev. 5 — 19 October 2011

3 of 15

Nexperia

74LVC86A

Quad 2-input EXCLUSIVE-OR gate

5.

Pinning information

5.1 Pinning

5.2 Pin description

6.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 4.

Pin configuration for SO14 and (T)SSOP14

Fig 5.

Pin configuration for DHVQFN14

86

1A

VCC

1B

4B

1Y

4A

2A

4Y

2B

3B

2Y

3A

GND

3Y

001aad103

1

2

3

4

5

6

7

8

10

9

12

11

14

13

001aad105

86

Transparent top view

2Y

3A

2B

3B

2A

4Y

1Y

4A

4B

1B

GND(1)

6

9

5

10

4

11

3

12

2

13

terminal 1

index area

Table 2.

Pin description

Symbol

Pin

Description

1A, 2A, 3A, 4A

1, 4, 9, 12

data input

1B, 2B, 3B, 4B

2, 5, 10, 13

data input

1Y, 2Y, 3Y, 4Y

3, 6, 8, 11

data output

GND

7

ground (0 V)

VCC

14

supply voltage

Table 3.

Functional table[1]

Input

Output

nA

nB

nY

LLL

LH

H

HL

H

HHL