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74LVC74ABQ 데이터시트(PDF) 2 Page - Nexperia B.V. All rights reserved |
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74LVC74ABQ 데이터시트(HTML) 2 Page - Nexperia B.V. All rights reserved |
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2 / 19 page ![]() 74LVC74A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 7 — 20 November 2012 2 of 19 NXP Semiconductors 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger 3. Ordering information 4. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC74AD 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74LVC74ADB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 74LVC74APW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74LVC74ABQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 3 0.85 mm SOT762-1 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Functional diagram mna418 RD FF SD 410 Q 1Q 2Q 1Q 2Q 5 9 2 12 3 11 6 8 Q 1SD CP 2CP 1CP 2D 1D D 2SD 113 1RD 2RD mna419 6 3 2 C1 4 S 1D 1 R 5 8 11 12 C1 10 S 1D 13 R 9 RD FF SD 4 Q 1Q 1Q 5 2 3 6 Q 1SD CP 1CP 1D D 1 1RD mna420 RD FF SD 10 Q 2Q 2Q 9 12 11 8 Q 2SD CP 2CP 2D D 13 2RD |
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