| 전자부품 데이터시트 검색엔진 |
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HMC772LC4 데이터시트(PDF) 14 Page - Analog Devices |
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HMC772LC4 데이터시트(HTML) 14 Page - Analog Devices |
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14 / 17 page ![]() 13 - 14 13 For price, delivery, and to place orders: Analog Devices, Inc., One Analog Way, Wilmington, MA 01887 Phone: 781-937-1428 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D HMC981LP3E v02.1222 ACTIVE BIAS CONTROLLER Figure 1. Daisy Chain Operation Operation Modes HMC981LP3E can be configured to bias both enhancement and depletion mode external amplifiers. The mode of operation can be selected by setting two pins (VNEGFB, VGATEFB) as tabulated in Table-2. The connection to the VNEGIN should be adjusted accordingly. In order not to bias external amplifier in a wrong region, please make sure that the correct mode of operation is selected before powering up the HMC981LP3E. The HMC981LP3E does not allow the internal negative voltage generator to work if an enhancement mode is selected. Therefore, if VNEGFB is left floating while VGATEFB is grounded, HMC981LP3E will stay in standby mode. Please note that the external negative voltage should be between -2.5V to -3.5V for HMC981LP3E to operate. If your application requires negative voltages outside this range please contact Hittite application support. Table 2. Mode Selection VNEGFB VGATEFB VNEGIN Description MODE1 (Depletion/Master Mode) FLOAT FLOAT Connected to VNEGOUT Depletion mode transistor. Internal negative voltage generator is active and generates -2.5V. Sample application schematic given shown in Fig.2a. MODE2 (Depletion/Slave Mode) GND FLOAT Connected to External VSS Depletion mode transistor. Internal negative voltage generator is disabled. An external negative voltage less than -2.3V should be connected to VNEGIN. Sample application schematic given shown in Fig.2b. --- FLOAT GND N/A Not allowed. HMC981LP3E stays in standby. MODE3 (Enhancement Mode) GND GND Connected to GND Enhancement mode transistor. Internal negative voltage generator is disabled. Sample application schematic given shown in Fig.2c. |
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