Block description

STOTG04E

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direction is controlled by bidi_en Bit of Control Register 3 (described later). When these signals are

bidirectional, the direction is controlled by the OE_TP_INT/ signal (see Tables 11 and 12).

The actual mode of operation is controlled by the dat_se0 Bit of Control Register 1 (see Tables 11 and 12)

Table 11.

DAT_SE0 (dat_se0 = 1)

Table 12.

VP_VM (dat_se0 = 0)

* State of the OE_TP_INT/ signal.

In the USB mode of operation it is necessary to control the rise and fall times of the transmission driver.

These times are different for low-speed and full-speed USB settings. Selection of actual USB speed can

be done using the bit speed of Control Register 1 or/and the SPEED pin (see table 13).

Table 13.

USB Speed selection

6.7.3

The actual mode of operation is selectable by the transp_en and uart_en Bits of Control Register 1 (see

table 14).

Table 14.

Transceiver modes

(1) In reality, it is not possible to set both these bits at the same time. In this case, only uart_en bit will remain set.

signal is low. The transceiver automatically enables the pull-up resistor on the SDA line in this mode. The

Communication addressed to the STOTG04 device is mirrored to the D+ pin and responses from this pin

are mirrored back to the SDA pin. The D– pin mirrors the SCL clock.

In the UART mode it is possible to select driver direction on both the D+ and D– pins. The selection is

done using the bdir[1] and bdir[0] Bits of Control Register 3 (see table 15).

bidi_en

OE/*

DAT_VP

SE0_VM

1

0

Differential driver input

SE0 driver input

1

Differential receiver output

SE0 detector output

0

X

Differential driver input

SE0 driver input

bidi_en

OE/*

DAT_VP

SE0_VM

1

0

D+ driver input

D- driver input

1

D+ receiver output

D- receiver output

0

X

D+ driver input

D- driver input

speed bit

SPEED Pin

USB Mode

0X

low-speed

X0

1

1

full-speed

transp_en

uart_en

STOTG04 Mode

00

USB

01

UART

10

11

UART (1)