DEVICE INFORMATION

AVDD_PA1

1

2

3

4

12

11

10

9

5

6

7

8

16

15

14

13

QFN-16 4x4mm

RF_N

RXTX

RF_P

GND

ANT

GND

AVDD_PA2

CC2591

The CC2591 pinout and description are shown in Figure 1 and Table 1, respectively.

PIN AND I/O CONFIGURATION

(TOP VIEW)

Figure 1.

NOTE:

The exposed die attach pad must be connected to a solid ground plane as this is the

primary ground connection for the chip. Inductance in vias to the pad should be

minimized. It is highly recommended to follow the reference layout. Changes will alter

the performance. Also see the PCB landpattern information in this data sheet.

For best performance, minimize the length of the ground vias, by using a 4-layer PCB

with ground plane as layer 2 when CC2591 is mounted onto layer 1.

4

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Product Folder Link(s): CC2591