Symbol

Alt

Parameter

Min

Max

Unit

Clock Rise Time

1

µs

Clock Fall Time

300

ns

Input Rise Time

1

µs

Input Fall Time

300

ns

(1)

Clock High to Input Transition

4.7

µs

Clock Pulse Width High

4

µs

Input Low to Clock Low (START)

4

µs

Clock Low to Input Transition

0

µs

Clock Pulse Width Low

4.7

µs

Input Transition to Clock Transition

250

ns

Clock High to Input High (STOP)

4.7

µs

Input High to Input Low (Bus Free)

4.7

µs

(2)

Clock Low to Next Data Out Valid

0.3

3.5

µs

Data Out Hold Time

300

ns

Clock Frequency

100

kHz

(3)

Write Time

10

ms

Notes: 1. For a reSTART condition, or following a write cycle.

2. The minimum value delays the falling/rising edge of SDA away from SCL = 1 in order to avoid unwanted START and/or STOP

conditions.

3. In the Multibyte Write mode only, if accessed bytes are on two consecutive 8 bytes rows (5 address MSB are not constant)

the maximum programming time is doubled to 20ms.

Table 7. AC Characteristics

DEVICE OPERATION

I

protocol defines any device that sends data onto

the bus as a transmitter and any device that reads

the data as a receiver. The device that controls the

data transfer is known as the master and the other

as the slave. The master will always initiate a data

transfer and will provide the serial clock for syn-

chronisation. The ST24/25x16 are always slave

devices in all communications.

Start Condition. START is identified by a high to

low transition of the SDA line while the clock SCL

is stable in the high state. A START condition must

precede any command for data transfer. Except

during a programming cycle, the ST24/25x16 con-

tinuously monitor the SDA and SCL signals for a

START condition and will not respond unless one

is given.

AI00825

0.8VCC

0.2VCC

0.7VCC

0.3VCC

Figure 4. AC Testing Input Output Waveforms

Input Rise and Fall Times

≤ 50ns

Input Pulse Voltages

Input and Output Timing Ref.

Voltages

Table 8. AC Measurement Conditions

6/17

ST24/25C16, ST24/25W16