ST52T430 datasheet(64/88 Pages) STMICROELECTRONICS

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ST52T430/E430

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11 SERIAL COMMUNICATION INTERFACE

The

Serial

Communication

Interface

(SCI)

integrated into the ST52x430 fuzzy processor

provides

general

purpose

shift

peripheral, which links several widely distributed

MCU’s through their SCI subsystem. SCI offers a

serial interface providing communication with

common baud rates up to 38,400 and flexible

character format.

SCI is a full-duplex UART-type asynchronous

system with standard Non Return to Zero (NRZ)

format for the transmitted/received bit. The length

of the transmitted word is 10/11 bits (1 start bit, 8/

9 data bits, 1 stop bit).

SCI is composed of three modules: Receiver,

Transmitter

and

Baud-Rate

Generator.

It is

configured by means of Configuration Registers 19

and 20.

WARNING: IN ORDER TO WORK PROPERLY

WITH SCI PERIPHERALS MAINTAINING THE

DESIRED BAUD RATE A SYSTEM CLOCK OF

ONLY 5, 10 OR 20 MHz MUST BE USED.

11.1 SCI Receiver block

The

SCI

Receiver

block

manages

the

synchronization of the serial data stream and

stores data characters. The SCI Receiver is mainly

formed by two sub-systems: Recovery Buffer

Block and SCDR_RX Block.

Figure 11.1 SCI transmitted word structures

The RE configuration bit (bit 1 of the Configuration

set to “1”.

SCI receives data deriving from the RX/PC5 pin

and drives the Recovery Buffer Block, which is a

high-speed shift register operating at a clock

frequency (CLOCK_RX) that is 16 times higher

than the fixed baud rate (CLOCK_TX). This

sampling rate, higher than the Baud Rate clock

allows the detection of the START condition, Noise

error and Frame error.

Figure 11.2 SCI Block Diagram

SCI

RAM

SCDR_TX

LDPR 9 ram-i

LDPE 9 epr-i

Baud-Rate

Generator

LDRI ram-i 18

SHIFT REGISTER

SCDR_RX

RECOVERY BUFFER

RX/PC5

TX/PC4

SCI Transmitter

SCI Receiver

MCLK

RAM / EPROM

IR 18

OR 9

STOP

DATA

START

STOP

DATA

START

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