LAN9215I datasheet(21/138 Pages) SMSC

21 / 138 page

Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support

Datasheet

SMSC

LAN9215i

Revision 1.93 (12-12-07)

DATASHEET

Note 2.2

Pins RXD[3:1] provide internal pull-down resistors to prevent these pins from floating when

unused. RXD0 (pin 75) does not provide an internal pull-down resistor. This pin must be

pulled or driven to a valid state at all times.

Note 2.3

The external SMI port is selected when SMI_SEL = 1. When SMI_SEL = 0, MDIO is tri-

stated and MDC is driven low.

Management Data

IO/External PHY

Detect

MDIO

(EXT_PHY_DET)

I/O8

(PD)

Management Data IO: When SMI_SEL = 1,

this pin is the MII SMI serial IO bus pin.

External PHY Detect: This pin also functions

as a strap input, which can be used to indicate

the presence of an external PHY.

See Note 2.3.

Note:

See Section 5.3.9, "HW_CFG—

Hardware Configuration Register" for

more information on SMI_SEL and

EXT_PHY_DET

Management Data

Clock

MDC

O8 (PD)

Management Data Clock: When SMI_SEL = 1,

this pin is the MII management data clock.

When SMI_SEL=0, this pin is driven low.

See Note 2.3.

Note:

See Section 5.3.9, "HW_CFG—

Hardware Configuration Register" for

more information on SMI_SEL.

Table 2.6 MII Interface Signals

NAME

SYMBOL

BUFFER

TYPE

NUM

PINS

DESCRIPTION

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