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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST6215 데이터시트(PDF) 43 Page - STMicroelectronics |
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ST6215 데이터시트(HTML) 43 Page - STMicroelectronics |
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43 / 105 page  ST6215C/ST6225C 43/105 9 ON-CHIP PERIPHERALS 9.1 WATCHDOG TIMER (WDG) 9.1.1 Introduction The Watchdog timer is used to detect the occur- rence of a software fault, usually generated by ex- ternal interference or by unforeseen logical condi- tions, which causes the application program to abandon its normal sequence. The Watchdog cir- cuit generates an MCU reset on expiry of a pro- grammed time period, unless the program refresh- es the counter’s contents before the SR bit be- comes cleared. 9.1.2 Main Features s Programmable timer (64 steps of 3072 clock cycles) s Software reset s Reset (if watchdog activated) when the SR bit reaches zero s Hardware or software watchdog activation selectable by option bit (Refer to the option bytes section) Figure 25. Watchdog Block Diagram RESET C 7-BIT DOWNCOUNTER fint /12 SR T0 CLOCK DIVIDER WATCHDOG REGISTER (WDGR) ÷ 256 T1 T2 T3 T4 T5 bit 0 bit 7 1 |
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