ST6391 datasheet(26/68 Pages) STMICROELECTRONICS

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RESET

IS RESET

STILL PRESENT ?

YES

VA000427

NMI MASK SET

INT LATCH CLEARED

( IF PRESENT )

SELECT

NMI MODE FLAGS

PUT FFEh

ON ADDRESS BUS

LOAD PC

FROM RESET LOCATIONS

FFE / FFF

FETCH INSTRUCTION

Figure 23. Reset & Interrupt Processing

Flow-Chart

RESET VECTOR

INITIALIZATION

ROUTINE

JP: 2 BYTES/4 CYCLES

RETI: 1BYTES/2 CYCLES

RETI

VA 000181

RESET

Figure 24. Restart Initialization Program

Flow-Chart

MCU Initialization Sequence

When a reset occurs the stack is reset to program

counter, the PC is loaded with the address of the

reset vector (located in the program ROM at ad-

dresses FFEh & FFFh). A jump instruction to the

beginning of the program has to be written into

these locations. After a reset the interrupt mask is

automatically activated so that the Core is in non-

maskable interrupt mode to prevent false or ghost

interrupts during the restart phase. Therefore the

restart routine should be terminated by a RETI in-

struction to switch to normal mode and enable in-

terrupts. If no pending interrupt is present at the

end of the reset routine, the ST639x will continue

with the instruction after the RETI; otherwise the

pending interrupt will be serviced.

RESET Low Power Mode

(ST6392 and ST6399 only)

When the reset pin is low, the quartz oscillator is

Disabled allowing reduced current consumption.

When the reset pin is raised the quartz oscillator is

enabled and oscillations will start to build up.The

internal reset circuitry will count 2048 clocks on the

oscillator pin before allowing the MCU to go out of

the reset state; the clocks are after a schmitt trigger

so that false or multiple counts are not possible.

RESET (Continued)

ST6391,92,93,95,97,99

22/64

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