ST6387 datasheet(20/84 Pages) STMICROELECTRONICS

20 / 84 page

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ST6365, ST6375, ST6385 ST6367, ST6377, ST6387

RESETS (Cont’d)

3.2.3 Watchdog Reset

The MCU provides a Watchdog timer function in

order to ensure graceful recovery from software

upsets. If the Watchdog register is not refreshed

before an end-of-count condition is reached, the

internal reset will be activated. This, amongst oth-

er things, resets the watchdog counter.

The MCU restarts just as though the Reset had

been generated by the RESET pin, including the

built-in stabilisation delay period.

3.2.4 Application Note

No external resistor is required between VDD and

the Reset pin, thanks to the built-in pull-up device.

3.2.5 MCU Initialization Sequence

When a reset occurs the stack is reset, the PC is

loaded with the address of the Reset Vector (locat-

ed in program ROM starting at address 0FFEh). A

jump to the beginning of the user program must be

coded at this address. Following a Reset, the In-

terrupt flag is automatically set, so that the CPU is

in Non Maskable Interrupt mode; this prevents the

initialisation routine from being interrupted. The in-

itialisation routine should therefore be terminated

by a RETI instruction, in order to revert to normal

mode and enable interrupts. If no pending interrupt

is present at the end of the initialisation routine, the

MCU will continue by processing the instruction

immediately following the RETI instruction. If, how-

ever, a pending interrupt is present, it will be serv-

iced.

Figure 15. Reset and Interrupt Processing

Figure 16. Reset Circuit

RESET

VECTOR

JP:2 BYTES/4 CYCLES

RETI

RETI: 1 BYTE/2 CYCLES

INITIALIZATION

ROUTINE

VA00181

VA0200E

TO ST6

RESET

ST6

INTERNAL

RESET

OSCILLATOR

SIGNAL

WATCHDOG RESET

VDD

300k

RESET

(ACTIVE LOW)

COUNTER

POWER ON/OFF RESET

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