ST7263 datasheet(101/109 Pages) STMICROELECTRONICS

부품명	ST7263

상세설명	LOW SPEED USB 8-BIT MCU FAMILY with up to 16K MEMORY, up to 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I2C

PDF	109 Pages

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제조업체	STMICROELECTRONICS [STMicroelectronics]

홈페이지	http://www.st.com

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ST7263

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COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)

7.8.2 I2C - Inter IC Control Interface

1) The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the undefined

region of the falling edge of SCL

2) The maximum hold time of the START condition has only to be met if the interface does not stretch the low period of

SCL signal

Cb = total capacitance of one bus line in pF

2C/DDC-Bus Timings

Parameter

Standard I

Fast I

Symbol

Unit

Min

Max

Min

Max

Bus free time between a STOP and START con-

dition

4.7

1.3

TBUF

Hold time START condition. After this period,

the first clock pulse is generated

4.0

0.6

THD:STA

µs

LOW period of the SCL clock

4.7

1.3

TLOW

µs

HIGH period of the SCL clock

4.0

0.6

THIGH

µs

Set-up time for a repeated START condition

4.7

0.6

TSU:STA

µs

Data hold time

0 (1)

0.9(2)

THD:DAT

Data set-up time

250

100

TSU:DAT

Rise time of both SDA and SCL signals

1000

20+0.1Cb

300

Fall time of both SDA and SCL signals

300

20+0.1Cb

300

Set-up time for STOP condition

4.0

0.6

TSU:STO

Capacitive load for each bus line

400

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