ST7LITE02 datasheet(94/122 Pages) STMICROELECTRONICS

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ST7LITE0, ST7SUPERLITE

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13.8 I/O PORT PIN CHARACTERISTICS

13.8.1 General Characteristics

Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.

Notes:

1. Data based on characterization results, not tested in production.

2. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for

example or an external pull-up or pull-down resistor (see Figure 65). Data based on design simulation and/or technology

characteristics, not tested in production.

3. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-

scribed in Figure 66).

4. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external

interrupt source.

Figure 65. Two typical Applications with unused I/O Pin

Figure 66. Typical IPU vs. VDD with VIN=VSS

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

0.3xVDD

VIH

Input high level voltage

0.7xVDD

Vhys

Schmitt trigger voltage

hysteresis 1)

400

Input leakage current

VSS≤VIN≤VDD

±1

µA

Static current consumption 2)

Floating input mode

200

RPU

Weak pull-up equivalent

resistor3)

VIN=VSS

VDD=5V

120

250

Ω

VDD=3V

160

CIO

I/O pin capacitance

tf(IO)out

Output high to low level fall

time 1)

CL=50pF

Between 10% and 90%

tr(IO)out

Output low to high level rise

time 1)

tw(IT)in

External interrupt pulse time 4)

1tCPU

10k

Ω

UNUSED I/O PORT

ST7XXX

10k

Ω

UNUSED I/O PORT

ST7XXX

VDD

Note: only external pull-up allowed on ICCCLK pin

TO BE CHARACTERIZED

22.5

33.5

4.5

55.5

Vdd(V)

Ta=1 40°C

Ta=9 5°C

Ta=2 5°C

Ta=-45 °C

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