July 2005

9

MIC5021

MIC5021

Micrel, Inc.

Remote Overcurrent Limiting Reset

In circuit breaker applications where the MIC5021 maintains

an off condition after an overcurrent condition is sensed, the

Input

Gnd

Gate

Sense-

Sense+

TTL Input

N-Channel

Power

MOSFET

+12V to +20V

MIC5021

1

2

3

4

8

7

6

5

10µF

0.01

µF

Load

74HC04

(example)

2N3904

Q1

10k to

100k

Retry (H)

Maintained (L)

Figure 11. Remote Control Circuit

output off when an overcurrent is sensed. Switching Q1 off

20µs and continues to retry until the overcurrent condition

is removed.

For demonstration purposes, a 680Ω load resistor and 3Ω

sense resistor will produce an overcurrent condition when the

load’s supply (V+) is approximately 12V or greater.

Low-Temperature Operation

AsthetemperatureoftheMIC5021AJB(extendedtemperature

range version—no longer available) approaches –55°C, the

driver’s off-state, gate-output offset from ground increases.

If the operating environment of the MIC5021AJB includes

low temperatures (–40°C to –55°C), add an external 2.2MΩ

resistor as shown in Figures 12a or 12b. This assures that

the driver’s gate-to-source voltage is far below the external

MOSFET’s gate threshold voltage, forcing the MOSFET

fully off.

Input

Gnd

Gate

Sense-

Sense+

TTL Input

+12V to +36V

MIC5021AJB

1

2

3

4

8

7

6

5

10µF

2.7

nF

Load

2.2M

add resistor for

–40°C to –55°C

operation

Figure 12a. Gate-to-Source Pull Down

The gate-to-source configuration (refer to Figure 12a) is

appropriateforresistiveandinductiveloads. Thisalsocauses

the smallest decrease in gate output voltage.

Input

Gnd

Gate

Sense-

Sense+

TTL Input

+12V to +36V

MIC5021AJB

1

2

3

4

8

7

6

5

10µF

2.7

nF

Load

2.2M

add resistor for

–40°C to –55°C

operation

Figure 12b. Gate-to-Ground Pull Down

The gate-to-ground configuration (refer to Figure 12b) is ap-

propriate for resistive, inductive, or capacitive loads. This

configuration will decrease the gate output voltage slightly

more than the circuit shown in Figure 12a.