전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

TAS5705PAP 데이터시트(PDF) 13 Page - Texas Instruments

Click here to check the latest version.
부품명 TAS5705PAP
상세설명  20-W STEREO DIGITAL AUDIO POWER AMPLIFIER WITH EQ AND DRC
PDF  71 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

TAS5705PAP 데이터시트(HTML) 13 Page - Texas Instruments

Back Button TAS5705PAP Datasheet HTML 9Page - Texas Instruments TAS5705PAP Datasheet HTML 10Page - Texas Instruments TAS5705PAP Datasheet HTML 11Page - Texas Instruments TAS5705PAP Datasheet HTML 12Page - Texas Instruments TAS5705PAP Datasheet HTML 13Page - Texas Instruments TAS5705PAP Datasheet HTML 14Page - Texas Instruments TAS5705PAP Datasheet HTML 15Page - Texas Instruments TAS5705PAP Datasheet HTML 16Page - Texas Instruments TAS5705PAP Datasheet HTML 17Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 71 page
background image
RESET TIMING (RESET)
t
w(RESET)
Earliesttime
thathardmute
couldbeexited
RESET
VALID
t
d(VALID_LOW)
t
d(I2C_ready)
Startsystem
t
d(run)
Systeminitialization.
EnableviaI C.
2
T0029-05
POWER-DOWN (PDN) TIMING
PDN
VALID
t
d(STARTUP)
t
d(VALID_LOW)
T0030-04
t
w
TAS5705
www.ti.com ...................................................................................................................................................................................................... SLOS549 – JUNE 2008
Control signal parameters over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
td(VALID_LOW)
Time to assert VALID (reset to power stage) low
100
ns
tw(RESET)
Pulse duration, RESET active
100
200
ns
td(I2C_ready)
Time to enable I2C
3.5
ms
td(run)
Device start-up time (after start-up command via I2C)
10
ms
NOTE: RESET must be asserted low at least 100
µs after DVDD reaches 3.0 V.
Figure 5. Reset Timing
Control signal parameters over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
td(VALID_LOW)
Time to assert VALID (reset to power stage) low
725
µs
td(STARTUP)
Device startup time
650
µs
tw
Minimum pulse duration required
1
µs
Figure 6. Power-Down Timing
Copyright © 2008, Texas Instruments Incorporated
Submit Documentation Feedback
13
Product Folder Link(s): TAS5705



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com