 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AT89C51CC03U-RDTIM 데이터시트(PDF) 70 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT89C51CC03U-RDTIM 데이터시트(HTML) 70 Page - ATMEL Corporation |
|
|
70 / 183 page  70 AT89C51CC03 4182B–CAN–09/03 Mode 0 (13-bit Timer) Mode 0 configures Timer 0 as an 13-bit Timer which is set up as an 8-bit Timer (TH0 register) with a modulo 32 prescaler implemented with the lower five bits of TL0 register (see Figure 35). The upper three bits of TL0 register are indeterminate and should be ignored. Prescaler overflow increments TH0 register. Figure 35. Timer/Counter x (x = 0 or 1) in Mode 0 Mode 1 (16-bit Timer) Mode 1 configures Timer 0 as a 16-bit Timer with TH0 and TL0 registers connected in cascade (see Figure 36). The selected input increments TL0 register. Figure 36. Timer/Counter x (x = 0 or 1) in Mode 1 FTx CLOCK TRx TCON reg TFx TCON reg 0 1 GATEx TMOD reg ÷ 6 Overflow Timer x Interrupt Request C/Tx# TMOD reg TLx (5 bits) THx (8 bits) INTx# Tx See the “Clock” section TRx TCON reg TFx TCON reg 0 1 GATEx TMOD reg Overflow Timer x Interrupt Request C/Tx# TMOD reg TLx (8 bits) THx (8 bits) INTx# Tx FTx CLOCK ÷ 6 See the “Clock” section |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
