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CC1010T 데이터시트(PDF) 21 Page - List of Unclassifed Manufacturers

부품명 CC1010T
상세설명  Single Chip Very Low Power RF Transceiver with 8051-Compatible Microcontroller
PDF  133 Pages
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Chipcon
Chipcon
Chipcon
Chipcon
SmartRF
SmartRF
SmartRF
SmartRF â CC1010
Chipcon AS
SmartRFâ CC1010 PRELIMINARY Datasheet (rev. 1.0) 2002-09-18
Page 21 of 133
CPU Registers
CC1010 provides 4 register banks of 8
registers each. These register banks are
mapped in the the internal data memory
(see the Memory section on page 31) at
addresses 0x00 - 0x07, 0x08 - 0x0F, 0x10
- 0x17 and 0x18 - 0x1F. Each register
bank contains the 8 8-bit registers R0
through R7. The different register banks
are selected through the Program Status
Word PSW.RS(1:0) as shown below.
PSW
also contains carry, overflow and
parity flags that reflect the current CPU
state.
In addition, the CPU uses the accumulator
register A (accessed via the SFR space as
ACC
), B (for multiplication and division) and
the stack pointer SP. These registers are
shown below. Note that the hardware
stack pointer SP is increased when
pushing and decreased when popping
data, unlike many other microcontroller
architectures.
PSW (0xD0) - Program Status Word
Bit
Name
R/W
Description
7
CY
R/W
Carry Flag, set to 1 when the last arithmetic operation resulted in a
carry (during addition) or borrow (during subtraction), otherwise
cleared to 0 by all arithmetic operations. CY is also used for
rotation instructions.
6
AC
R/W
Auxiliary carry flag. Set to 1 when the last arithmetic operation
resulted in a carry into (during addition) or borrow from (during
subtraction) the high order nibble, otherwise cleared to 0 by all
arithmetic operations.
5
F0
R/W
Flag 0 (Available to the user for general purpose)
4
RS1
R/W
3
RS0
R/W
Register bank select.
RS1
RS0
Working register bank and address
0
0
Bank0
0x00-0x07
0
1
Bank1
0x08-0x0F
1
0
Bank2
0x10-0x17
1
1
Bank3
0x18-0x1F
2
OV
R/W
Overflow flag. Set to 1 when the last arithmetic operation resulted
in a carry (addition), borrow (subtraction), or overflow (multiply or
divide). Otherwise, the bit cleared to 0 by all arithmetic operations.
1
F1
R/W
Flag 1 (Available to the user for general purpose)
0
P
R/W
Parity flag. Set to 1 when the modulo-2 sum of the 8 bits in the
accumulator is 1 (odd parity), cleared to 0 on even parity.
ACC (0xE0) - Accumulator Register
Bit
Name
R/W
Description
7:0
ACC(7:0)
R/W
Accumulator
B (0xF0) - B Register
Bit
Name
R/W
Description
7:0
B(7:0)
R/W
B
is used for multiplication and division
SP (0x81) - Stack Pointer
Bit
Name
R/W
Description
7:0
SP(7:0)
R/W
Stack Pointer, used for pushing and poping data to and from the
stack. Note that the reset value for SP is 0x07



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