AT91SAM7A2-AI datasheet(85/369 Pages) ATMEL

85 / 369 page

PRELIMINARY

AT91SAM7A2

6021A–ATARM–07/04

When a transfer is performed, the counter is decremented and the pointer is incre-

mented. When the counter reaches 0 (i.e. all the data have been sent/received to/from

the module), the end status bit is set in the peripheral status register and can be pro-

grammed to generate an interrupt.

PDC Transfers

PDC transfers consist of byte (8-bit), half-word (16-bit) or word (32-bit) data transmitted

from peripheral to memory or from memory to peripheral.

Transfers are triggered by the peripheral signals.

The PDC makes block transfers one byte, one half-word or one word at a time (pro-

grammed in the PDC_CRx register, with direction). Each transfer is triggered by a PDC

request from the peripheral. The PDC releases the AMBA bus after each transfer. A

new trigger is needed for each transfer.

Between transfers, the ASB memory pointer is incremented and the transfer counter is

decremented.

Each block of data can be programmed to be up to 64 Kbytes.

Transfers stop when the transfer counter reaches zero, and the trigger is disabled.

Figure 44. Transfer Example (Byte)

Memory Pointers

There is one 32-bit memory address pointer for each channel (PDC_MPRx). Each

memory pointer points to a location in the AT91SAM7A2 memory space (on chip RAM

or external memory on the EBI).

The PDC_MPRx is automatically incremented by 1, 2 or 4 after each transfer, for byte,

half-word or word transfers. The PDC_MPRx must be initialized before any transfers are

started.

If PDC_MPRx is reprogrammed while the PDC is operating, the address of the transfers

will be changed. The PDC will continue to perform transfers when triggered, from the

newly programmed address.

Transfer Counter

There is one 16-bit Transfer Counter (PDC_TCRx) for each channel, which is used to

count the size of the block of transfers. The PDC_TCRx is decremented after every data

transfer. When the PDC_TCRx reaches zero the block transfer is complete, the PDC

stops transferring data and disables the trigger.

It is not possible to trigger a block of transfers if the PDC_TCRx value is zero. When the

PDC_TCRx is programmed to a non-zero value, transfers can be triggered by the

peripheral for that particular channel.

RDY

00001000

END

XXXXXXXX

00001000

00001002

00001001

XXXXXXXX

00001003

Memory Pointer

(MPR)

Counter

(TCR)

Memory Address

AT91SAM7A2-AI 데이터시트(PDF) 85 Page - ATMEL Corporation

AT91SAM7A2-AI 데이터시트(HTML) 85 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL