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C161V 데이터시트(PDF) 21 Page - Siemens Semiconductor Group |
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C161V 데이터시트(HTML) 21 Page - Siemens Semiconductor Group |
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21 / 260 page ![]() Semiconductor Group 2-9 10Jul97@15:19h Architectural Overview / C161 The on-chip XBUS is an internal representation of the external bus and allows to access integrated application-specific peripherals/modules in the same way as external components. It provides a defined interface for these customized peripherals. The C161 derivatives have no X-Peripherals implemented. Clock Generator The on-chip clock generator provides the C161 with its basic clock signal that controls all activities of the controller hardware. Its oscillator can either run with an external crystal and appropriate oscillator circuitry (see also recommendations in chapter „Dedicated Pins“) or it can be driven by an external oscillator. The oscillator either directly feeds the external clock signal to the controller hardware (through buffers, of course) or divides the external clock frequency by 2. This resulting internal clock signal is also referred to as “CPU clock”. Two separated clock signals are generated for the CPU itself and the peripheral part of the chip. While the CPU clock is stopped during the idle mode, the peripheral clock keeps running. Both clocks are switched off, when the power down mode is entered. Figure 2-3 Clock Generation Block Diagram C161 Clock Generation Modes 1) Prescaler operation. Default configuration after reset. 2) Direct drive: the maximum frequency depends on the duty cycle of the external clock signal. In emulation mode pin P0.15 (P0H.7) is inverted, ie. the configuration ’1XX’ would select direct drive in emulation mode. Reset Configuration P0.15-13 (P0H.7-5) CPU Frequency External Clock Input Range 1X X f XTAL / 2 1) 2 to 32 MHz 0X X f XTAL * 1 2) 1 to 16 MHz 2) |
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