M41T11

Operation

11/29

2.2

Read mode

In this mode, the master reads the M41T11 slave after setting the slave address (see

Figure 8). Following the write mode control bit (R/W = 0) and the acknowledge bit, the word

address are repeated, followed by the READ mode control bit (R/W = 1). At this point, the

master transmitter becomes the master receiver. The data byte which was addressed will be

transmitted and the master receiver will send an acknowledge bit to the slave transmitter

(see Figure 9). The address pointer is only incremented on reception of an acknowledge bit.

master receiver reads and acknowledges the new byte and the address pointer is

This cycle of reading consecutive addresses will continue until the master receiver sends a

STOP condition to the slave transmitter.

An alternate READ mode may also be implemented, whereby the master reads the M41T11

slave without first writing to the (volatile) address pointer. The first address that is read is the

last one stored in the pointer (see Figure 10 on page 12).

Table 2.

AC characteristics

Symbol

1.

Min

Max

Unit

SCL clock frequency

0

100

kHz

Clock low period

4.7

µs

Clock high period

4

µs

SDA and SCL rise time

1

µs

SDA and SCL fall time

300

ns

START condition hold time

(after this period the first clock pulse is generated)

4µs

START condition setup time

(only relevant for a repeated start condition)

4.7

µs

Data setup time

250

ns

(2)

2.

Transmitter must internally provide a hold time to bridge the undefined region (300 ns max.) of the falling

edge of SCL.

Data hold time

0

µs

STOP condition setup time

4.7

µs

Time the bus must be free before a new transmission can start

4.7

µs