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L6732 데이터시트(PDF) 8 Page - STMicroelectronics

부품명 L6732
상세설명  Adjustable step-down controller with synchronous rectification
PDF  37 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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L6732 데이터시트(HTML) 8 Page - STMicroelectronics

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Pin connection and function
L6732
8/37
Pin n.
Name
Function
7
EAREF
By setting the voltage at this pin is possible to select the internal/external
reference and the switching frequency:
VEAREF 0-80 % of VCCDR -> external reference/FSW = 250 kHz
VEAREF = 80 %-95 % of VCCDR -> VREF = 0.6 V/FSW = 500 kHz
VEAREF = 95 %-100 % of VCCDR -> VREF = 0.6 V/FSW = 250 kHz
An internal clamp limits the maximum VEAREF at 2.5 V (typ.). The device
captures the analog value present at this pin at the start-up when VCC
meets the UVLO threshold.
8
OCL
A resistor connected from this pin to ground sets the valley- current-limit.
The valley current is sensed through the low-side MOSFET(s). The internal
current generator sources a current of 100 µA (IOCL) from this pin to ground
through the external resistor (ROCL). The over-current threshold is given by
the following equation:
Connecting a capacitor from this pin to GND helps in reducing the noise
injected from VCC to the device, but can be a low impedance path for the
high-frequency noise related to the GND. Connect a capacitor only to a
“clean” GND.
9
OCH
A resistor connected from this pin and the high-side MOSFET(s) drain sets
the peak-current-limit. The peak current is sensed through the high-side
MOSFET(s). The internal 100 µA current generator (IOCH) sinks a current
from the drain through the external resistor (ROCH). The over-current
threshold is given by the following equation:
10
PHASE
This pin is connected to the source of the high-side MOSFET(s) and
provides the return path for the high-side driver. This pin monitors the drop
across both the upper and lower MOSFET(s) for the current limit together
with OCH and OCL.
11
HGATE
This pin is connected to the high-side MOSFET(s) gate.
12
BOOT
Through this pin is supplied the high-side driver. Connect a capacitor from
this pin to the PHASE pin and a diode from VCCDR to this pin (cathode
versus BOOT).
13
PGND
This pin has to be connected closely to the low-side MOSFET(s) source in
order to reduce the noise injection into the device.
14
LGATE
This pin is connected to the low-side MOSFET(s) gate.
15
VCCDR
5 V internally regulated voltage. It is used to supply the internal drivers.
Filter it to ground with at least 1 µF ceramic cap.
16
VCC
Supply voltage pin.
The operative supply voltage range is from 4.5 V to 14 V.
Table 4.
Pin functions (continued)
I
VALLEY
I
OCL
R
OCL
•
2R
DSONLS
•
----------------------------------
=
I
PEAK
I
OCH
R
OCH
•
R
DSONHS
----------------------------------
=



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