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M54HC166K 데이터시트(PDF) 1 Page - STMicroelectronics |
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M54HC166K 데이터시트(HTML) 1 Page - STMicroelectronics |
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1 / 11 page ![]() 1/11 March 2004 s HIGH SPEED: fMAX =63MHz (TYP.) at VCC =6V s LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH =VNIL = 28% VCC (MIN.) s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL =4mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 166 s SPACE GRADE-1: ESA SCC QUALIFIED s 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST s NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION s DEVICE FULLY COMPLIANT WITH SCC-9306-043 DESCRIPTION The M54HC166 is an high speed CMOS 8 BIT PISO SHIFT REGISTER fabricated with silicon gate C2MOS technology. It consists of parallel or serial inputs and a serial-out 8 bit shift register with gated clock inputs and an overriding clear input. The parallel-in or serial-in modes are controlled by the SHIFT/LOAD input. When the SHIFT/LOAD input is held high, the serial data input is enabled and the eight flip-flops perform serial shifting with each clock pulse; when held low, the parallel data inputs are enabled and synchronous loading occurs on the next clock pulse. Clocking is accomplished on the low-to-high level edge of the clock pulse. The CLOCK-INHIBIT input should be changed to the high only while the clock input is held high. A direct clear input overrides all other inputs, including the clock, and sets all flip-flops to zero. Functional details are shown in the truth table and the timing chart. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M54HC166 RAD-HARD 8 BIT PISO SHIFT REGISTER PIN CONNECTION ORDER CODES PACKAGE FM EM DILC M54HC166D M54HC166D1 FPC M54HC166K M54HC166K1 DILC-16 FPC-16 |
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