TS2007FC

Package information

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Package information

In order to meet environmental requirements, STMicroelectronics offers these devices in

category of second level interconnect is marked on the package and on the inner box label,

in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics

Figure 47.

9-bump flip-chip pinout (top view)

Figure 48.

Marking (top view)

A

C

B

1

2

3

OUT-

GND

OUT+

GS

IN+

VCC

STBY

VCC

IN-

A

C

B

1

2

3

OUT-

GND

OUT+

GS

IN+

VCC

STBY

VCC

IN-

Balls are underneath

●

Logo: ST

●

First two digits for part number: K7

●

Third digit for assembly plant: X

●

Three digit date code: YWW

●

Dot indicates pin A1

●

E symbol for lead free

K7 X

YWW

E

K7 X

YWW

E