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STM8AF51XX 데이터시트(PDF) 13 Page - STMicroelectronics

부품명 STM8AF51XX
상세설명  Automotive 8-bit MCU, with up to 128 Kbytes Flash, EEPROM, 10-bit ADC, timers, LIN, CAN, USART, SPI, I2C, 3 V to 5.5 V
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STM8AF51XX 데이터시트(HTML) 13 Page - STMicroelectronics

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STM8AF61xx, STM8AF51xx
Product overview
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5.2
Single wire interface module (SWIM) and debug module
The single wire interface module, SWIM, together with an integrated debug module, permits
non-intrusive, real-time in-circuit debugging and fast memory programming.
5.2.1
SWIM
Single wire interface for direct access to the debugging module and memory programming.
The interface can be activated in all device operation modes and supports hot-plugging. The
maximum data transmission speed is 145 bytes/ms.
5.2.2
Debug module
The non-intrusive debugging module features a performance close to a full-featured
emulator. Besides memory and peripheral operation, CPU operation can also be monitored
in real-time by means of shadow registers.
●
R/W of RAM and peripheral registers in real-time
●
R/W for all resources when the application is stopped
●
Breakpoints on all program-memory instructions (software breakpoints) except the
vector table
●
Two advanced breakpoints and 23 predefined configurations
5.3
Interrupt controller
●
Nested interrupts with three software priority levels
●
32 interrupt vectors with hardware priority
●
Up to 37 external interrupts on five vectors
●
Trap and reset interrupts
5.4
Non-volatile memory
●
Up to 128 Kbytes of program single voltage Flash memory
●
Up to 2 Kbytes true (not emulated) data EEPROM
●
Read while write: Writing in the data memory is possible while executing code in the
program memory
●
128 user option bytes permit permanent device set up
5.4.1
Architecture
●
Array: Up to 128 Kbytes of Flash program memory organized in blocks of 128 bytes
each
●
Read granularity: 1 word = 4 bytes
●
Write/erase granularity: 1 word (4 bytes) or 1 block (128 bytes) in parallel
Writing, erasing, word and block register management is handled automatically by the
memory interface.



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