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GAL16V8D-25LS 데이터시트(PDF) 12 Page - Lattice Semiconductor

부품명 GAL16V8D-25LS
상세설명  High Performance E2CMOS PLD Generic Array Logic?
PDF  24 Pages
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제조업체  LATTICE [Lattice Semiconductor]
홈페이지  http://www.latticesemi.com
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GAL16V8D-25LS 데이터시트(HTML) 12 Page - Lattice Semiconductor

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Specifications GAL16V8D
12
tpd
A
Input or I/O to Comb. Output
1
3.5
1
5
1
7.5
ns
tco
A
Clock to Output Delay
1
3
1
4
1
5
ns
tcf2
—
Clock to Feedback Delay
—
2.5
—
3
—
3
ns
tsu
—
Setup Time, Input or Feedback before Clock↑
2.5
—
3
—5
—ns
th
—
Hold Time, Input or Feedback after Clock↑
0—
0
—
0
—
ns
A
Maximum Clock Frequency with
182
— 142.8 —
100
—
MHz
External Feedback, 1/(tsu + tco)
A
Maximum Clock Frequency with
200
—
166
—
125
—
MHz
Internal Feedback, 1/(tsu + tcf)
A
Maximum Clock Frequency with
250
—
166
—
125
—
MHz
No Feedback
twh
—
Clock Pulse Duration, High
2 4
—3 4
—4
—ns
twl
—
Clock Pulse Duration, Low
2 4
—3 4
—4
—ns
ten
B
Input or I/O to Output Enabled
—
4.5
1
6
1
9
ns
B
OE to Output Enabled
—
4.5
1
6
1
6
ns
tdis
C
Input or I/O to Output Disabled
—
4.5
1
5
1
9
ns
C
OE to Output Disabled
—
4.5
1
5
1
6
ns
-5
MIN. MAX.
SYMBOL
PARAMETER
MAXIMUM*
UNITS
TEST CONDITIONS
C
I
Input Capacitance
8
pF
V
CC = 5.0V, VI = 2.0V
C
I/O
I/O Capacitance
8
pF
V
CC = 5.0V, VI/O = 2.0V
*Characterized but not 100% tested.
AC Switching Characteristics
Over Recommended Operating Conditions
-7
MIN. MAX.
UNITS
PARAMETER
TEST
COND1.
DESCRIPTION
COM / IND
COM
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section. Characterized but not 100% tested.
4) Characterized but not 100% tested.
fmax3
-3
MIN. MAX.
COM
Capacitance (T
A = 25°C, f = 1.0 MHz)



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