전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

LFXP 데이터시트(PDF) 64 Page - Lattice Semiconductor

부품명 LFXP
상세설명  LatticeXP Family Data Sheet
PDF  130 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  LATTICE [Lattice Semiconductor]
홈페이지  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

LFXP 데이터시트(HTML) 64 Page - Lattice Semiconductor

Back Button LFXP Datasheet HTML 60Page - Lattice Semiconductor LFXP Datasheet HTML 61Page - Lattice Semiconductor LFXP Datasheet HTML 62Page - Lattice Semiconductor LFXP Datasheet HTML 63Page - Lattice Semiconductor LFXP Datasheet HTML 64Page - Lattice Semiconductor LFXP Datasheet HTML 65Page - Lattice Semiconductor LFXP Datasheet HTML 66Page - Lattice Semiconductor LFXP Datasheet HTML 67Page - Lattice Semiconductor LFXP Datasheet HTML 68Page - Lattice Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 64 / 130 page
background image
4-5
Pinout Information
Lattice Semiconductor
LatticeXP Family Data Sheet
Pin Information Summary
1 (Cont.)
XP10
XP15
XP20
Pin Type
256 fpBGA 388 fpBGA 256 fpBGA 388 fpBGA 484 fpBGA 256 fpBGA 388 fpBGA 484 fpBGA
Single Ended User I/O
188
244
188
268
300
188
268
340
Differential Pair User I/O
2
76
104
76
112
128
76
112
144
Configuration
Dedicated
11
11
11
11
11
11
11
11
Muxed
14
14
14
14
14
14
14
14
TAP
55555555
Dedicated
(total without supplies)
66666666
VCC
814814
28814
28
VCCAUX
4444
12
44
12
VCCPLL
22222222
VCCIO
Bank0
25254254
Bank1
25254254
Bank2
24244244
Bank3
24244244
Bank4
25254254
Bank5
25254254
Bank6
24244244
Bank7
24244244
GND
24
50
24
50
56
24
50
56
GNDPLL
22222222
NC
0240
0400
0
0
Single Ended/
Differential I/O
per Bank
2
Bank0
26/11
33/14
26/11
39/16
40/17
26/11
39/16
47/20
Bank1
26/11
33/14
26/11
39/16
40/17
26/11
39/16
47/20
Bank2
21/8
28/12
21/8
28/12
35/15
21/8
28/12
38/16
Bank3
21/8
28/12
21/8
28/12
35/15
21/8
28/12
38/16
Bank4
26/11
33/14
26/11
39/16
40/17
26/11
39/16
47/20
Bank5
26/11
33/14
26/11
39/16
40/17
26/11
39/16
47/20
Bank6
21/8
28/12
21/8
28/12
35/15
21/8
28/12
38/16
Bank7
21/8
28/12
21/8
28/12
35/15
21/8
28/12
38/16
VCCJ
11111111
1. During configuration the user-programmable I/Os are tri-stated with an internal pull-up resistor enabled. If any pin is not used (or not bonded
to a package pin), it is also tri-stated with an internal pull-up resistor enabled after configuration.
2. The differential I/O per bank includes both dedicated LVDS and emulated LVDS pin pairs. Please see the Logic Signal Connections table for
more information.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com