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STA680 데이터시트(PDF) 11 Page - STMicroelectronics

부품명 STA680
상세설명  HD Radio base-band receiver
PDF  43 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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STA680 데이터시트(HTML) 11 Page - STMicroelectronics

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STA680
I/O description
11/43
3
I/O description
The STA680 has two package options to suit different application needs. The first option is a
20x20mm LQFP package with 144 pins while the second one is a 12x12mm LFBGA with
169 balls and 0.8mm pitch.
3.1
LQFP description
Figure 5 presents the pinout of the STA680 for the LQFP package option. Different colors
have been used for I/O signals from different interfaces according to Table 2 reported in
Section 3.3.
Figure 5.
LQFP pinout (top view)
VDD
SDR_D7
SDR_D6
SDR_D5
VDD_RAM_IO
GND_RAM_IO
SDR_D4
SDR_D3
SDR_D2
VDD
GND
SDR_D1
SDR_D0
SDR_D8
SDR_D9
VDD_RAM_IO
GND_RAM_IO
SDR_D10
SDR_D11
SDR_D12
VDD
GND
SDR_D13
SDR_D14
SDR_D15
SDR_FEED_CLK
SDR_CLK_RAM3V3
VDD_RAM_IO_1V8
GND_RAM_IO_1V8
GND
VDD
SPI2_MISO
SPI2_SCK
SPI2_SS0_N
SPI2_MOSI
VDD_FSH_IO
1
108
2
107
3
106
4
105
5
104
6
103
7
102
8
101
9
100
10
99
11
98
12
97
13
96
14
95
15
94
16
93
17
92
18
91
19
90
20
89
21
88
22
87
23
86
24
85
25
84
26
83
27
82
28
81
29
80
30
79
31
78
32
77
33
76
34
75
35
74
36
73
TESTMODE
TRST_N
TCK
TMS
TDI
TDO
RTS_GPIO0
VDD
GND
CTS_GPIO1
GND_GEN_IO
VDD_GEN_IO
TXD_GPIO2
RXD_GPIO3
RESET_N
SPI1_SS0_N
SPI1_SCK
SPI1_MOSI
VDD
GND
SPI1_MISO
GND_GEN_IO
VDD_GEN_IO
IIC1_SCL
IIC1_SDA
BB2_Q
GND
VDD
GND_GEN_IO
VDD_GEN_IO
BB2_I
BB2_WS
BB2_BCK
BLEND
BB1_Q
VDD
AC00504
Color legenda:
SDRAM Interface
IIS Tuner Interfaces
Flash/Card Interfaces
Host Processor Interfaces
GPIO & UART Interfaces
IIS Audio Input Interface
Audio Output Interfaces



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