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BUF16821 데이터시트(PDF) 4 Page - EPCOS |
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BUF16821 데이터시트(HTML) 4 Page - EPCOS |
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4 / 29 page ![]() PIN CONFIGURATION V 2 COM OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 GND A (1) V S OUT7 OUT8 OUT9 V SD SCL V 1 COM OUT16 OUT15 OUT14 GND A (1) V S OUT13 OUT12 OUT11 OUT10 GND D (1) BKSEL A0 SDA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PowerPAD Lead-Frame DiePad Exposedon Underside (mustconnectto GND andGND ) A D BUF16821 SBOS428 – JULY 2008 ...................................................................................................................................................................................................... www.ti.com PWP PACKAGE HTSSOP-28 (TOP VIEW) NOTE: (1) GNDA and GNDD must be connected together. 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): BUF16821 |
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