 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
STW4811MBRAT/LF 데이터시트(PDF) 18 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STW4811MBRAT/LF 데이터시트(HTML) 18 Page - STMicroelectronics |
|
|
18 / 86 page  STw4811M/STw4811N Functional description 17/85 Figure 3. Start-up timing All regulators are started with PDN_regulators or EN_regulators but can be switched off from the beginning or during application by software, ‘pdn_(regulator)’ or ‘en_(regulator)’ bits ( Table 18,Table 24, and Table 25). PON ball PDN__OSC PDN_regulators VDDOK ball CLK32K_IN ball PORn ball PWREN ball OFF START_PM Reset 1ms INT_OSC TCXO_EN ball Internal_OSC 11*(1/32kHz) OFF2 MASTER_CLK ball REQUEST_MC ball VBAT 300µs 9.38ms (11ms wc) Reset START_BIAS 7.77ms (9.46ms wc) “or” Delays are worst case maximum delays Voutput(s) ball VPLL / VIO_VMEM VCORE CLK32K ball (*) (*) If 32 kHz available before VDDOK signal rising edge, OFF2 state duration is null |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
