Introduction

STCF03I

17/33

7.8

Writing to a single register

Writing to a single register starts with a START bit followed by the 7 bit device address of

operation. Then the master waits for an acknowledge from STCF03I. Then the 8 bit address

of register is sent to STCF03I. It is also followed by an acknowledge pulse. The last

transmitted byte is the data that is going to be written to the register. It is again followed by

an acknowledge pulse from STCF03I. The master then generates a STOP bit and the

communication is over. See Figure 9 below.

7.9

Interface protocol

The interface protocol is composed of (Table 8):

– A start condition (START)

– A Device address + R/W bit (read =1 / write =0)

– A Register address byte

– A sequence of data n* (1 byte + acknowledge)

– A stop condition (STOP)

Table 8.

Interface protocol

Device address + R/W bit

Register address

Data

765

4

3

2

1

0

7

6

5

4

3210

765

4

321

0

S

T

A

R

T

M

S

B

L

S

B

R

W

A

C

K

M

S

B

L

S

B

A

C

K

M

S

B

L

S

B

A

C

K

S

T

O

P

Figure 9.

Writing to a single register

S

T

A

R

T

DEVICE

ADDRESS

7 bits

A

C

K

W

R

I

T

E

M

S

B

L

S

B

R

/

W

A

C

K

ADDRESS OF

REGISTER

DATA

A

C

K

A

C

K

S

T

O

P

M

S

B

M

S

B

L

S

B

L

S

B

SDA LINE

S

T

A

R

T

DEVICE

ADDRESS

7 bits

A

C

K

W

R

I

T

E

M

S

B

L

S

B

R

/

W

A

C

K

ADDRESS OF

REGISTER

DATA

A

C

K

A

C

K

S

T

O

P

M

S

B

M

S

B

L

S

B

L

S

B

S

T

A

R

T

DEVICE

ADDRESS

7 bits

A

C

K

W

R

I

T

E

M

S

B

L

S

B

R

/

W

A

C

K

ADDRESS OF

REGISTER

DATA

A

C

K

A

C

K

S

T

O

P

M

S

B

M

S

B

L

S

B

L

S

B

SDA LINE