Rev.4.00 Jul. 28, 2004 page 1 of 8

HD74LVC573A

Octal D-type Transparent Latches with 3-state Outputs

REJ03D0360–0400Z

(Previous ADE-205-116B (Z))

Rev.4.00

Jul. 28, 2004

Description

The HD74LVC573A has eight D type latches with three state outputs in a 20 pin package. When the latch enable input

is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at

the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all

outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the

storage elements. Low voltage and high-speed operation is suitable at the battery drive product (note type personal

computer) and low power consumption extends the life of a battery for long time operation.

Features

• V

• All inputs V

• All outputs V

• Typical V

• Typical V

• High output current ±24 mA (@V

• Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LVC573AFPEL

SOP–20 pin (JEITA)

FP–20DAV

FP

EL (2,000 pcs/reel)

HD74LVC573ATELL

TSSOP–20 pin

TTP–20DAV

T

ELL (2,000 pcs/reel)

Note: Please consult the sales office for the above package availability.

Function Table

Inputs

OC

LE

D

Output Q

LH

H

H

LH

L

L

LL

X

HX

X

Z

H:

High level

L:

Low level

X:

Immaterial

Z:

High impedance

Level of Q before the indicated steady input conditions were established.