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M38044FBHKP 데이터시트(PDF) 92 Page - Renesas Technology Corp

부품명 M38044FBHKP
상세설명  SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PDF  116 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38044FBHKP 데이터시트(HTML) 92 Page - Renesas Technology Corp

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Rev.1.01
Jan 25, 2005
page 92 of 114
REJ03B0131-0101Z
3804 Group (Spec. H)
Pin name
Signal name
I/O
VCC,VSS
Power supply
I
CNVSS
CNVSS
I
RESET
Reset input
I
XIN
Clock input
I
XOUT
Clock output
O
AVSS
Analog power supply input
VREF
Reference voltage input
I
P00–P07,P10–P17,
I/O port
I/O
P20–P27,P30–P37,
P40–P43,P50–P57,
P60–P67
P44
RxD input
I
P45
TxD output
O
P46
SCLK input
I
P47
BUSY output
O
Table 17 Description of pin function (Flash Memory Serial I/O Mode 1)
Function
Apply 2.7 to 5.5 V to the Vcc pin and 0 V to the Vss pin.
After input of port is set, input “H” level.
Reset input pin. To reset the microcomputer, RESET pin should be held at an
“L” level for 16 cycles or more of XIN.
Connect an oscillation circuit between the XIN and XOUT pins.
As for the connection method, refer to the “clock generating circuit”.
Connect AVss to Vss.
Apply reference voltage of A/D to this pin.
Input “L” or “H” level, or keep open.
Serial data input pin.
Serial data output pin.
Serial clock input pin.
BUSY signal output pin.
Pin name
Signal name
I/O
VCC,VSS
Power supply
I
CNVSS
CNVSS
I
RESET
Reset input
I
XIN
Clock input
I
XOUT
Clock output
O
AVss
Analog power supply input
VREF
Reference voltage input
I
P00–P07,P10–P17,
I/O port
I/O
P20–P27,P30–P37,
P40–P43,P50–P57,
P60–P67
P44
RxD input
I
P45
TxD output
O
P46
SCLK input
I
P47
BUSY output
O
Table 18 Description of pin function (Flash Memory Serial I/O Mode 2)
Function
Apply 2.7 to 5.5 V to the Vcc pin and 0 V to the Vss pin.
After input of port is set, input “H” level.
Reset input pin. To reset the microcomputer, RESET pin should be held at an
“L” level for 16 cycles or more of XIN.
Connect an oscillation circuit between the XIN and XOUT pins.
As for the connection method, refer to the “clock generating circuit”.
Connect AVss to Vss.
Apply reference voltage of A/D to this pin.
Input “L” or “H” level, or keep open.
Serial data input pin.
Serial data output pin.
Input “L” level.
BUSY signal output pin.



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