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HD74ALVC2G74 데이터시트(PDF) 7 Page - Renesas Technology Corp

부품명 HD74ALVC2G74
상세설명  Single D-type Flip Flops with Preset and Clear
PDF  11 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD74ALVC2G74 데이터시트(HTML) 7 Page - Renesas Technology Corp

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HD74ALVC2G74
Rev.3.00, Dec.18.2003, page 7 of 10
VCC = 1.8
±0.15 V
Item
Symbol
Min
Typ
Max
Unit
Test
conditions
FROM
(Input)
TO
(Output)
Maximum clock
frequency
fmax
160
350
MHz
CL = 30 pF
1.5
8.0
PRE/CLR
Propagation
delay time
tPLH
tPHL
1.5
8.0
ns
CL = 30 pF
CLK
Q or
Q
3.5

D
Setup time
tsu
3.0

ns
PRE or CLR inactive
Hold time
th
0.0

ns
2.5

PRE or CLR “L”
Pulse width
tw
2.5

ns
CLK “H” or “L”
VCC = 2.5
±0.2 V
Item
Symbol
Min
Typ
Max
Unit
Test
conditions
FROM
(Input)
TO
(Output)
Maximum clock
frequency
fmax
160
400
MHz
CL = 30 pF
1.0
5.0
PRE/CLR
Propagation
delay time
tPLH
tPHL
1.0
5.0
ns
CL = 30 pF
CLK
Q or
Q
2.5

D
Setup time
tsu
2.0

ns
PRE or CLR inactive
Hold time
th
0.0

ns
2.0

PRE or CLR “L”
Pulse width
tw
2.0

ns
CLK “H” or “L”
VCC = 3.3
±0.3 V
Item
Symbol
Min
Typ
Max
Unit
Test
conditions
FROM
(Input)
TO
(Output)
Maximum clock
frequency
fmax
200
450
MHz
CL = 30 pF
1.0
3.5
PRE/CLR
Propagation
delay time
tPLH
tPHL
1.0
3.5
ns
CL = 30 pF
CLK
Q or
Q
2.0

D
Setup time
tsu
2.0

ns
PRE or CLR inactive
Hold time
th
0.0

ns
2.0

PRE or CLR “L”
Pulse width
tw
2.0

ns
CLK “H” or “L”



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