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HD74ACT107 데이터시트(PDF) 2 Page - Renesas Technology Corp

부품명 HD74ACT107
상세설명  Dual JK Flip-Flop (with Separate Clear and Clock)
PDF  7 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD74ACT107 데이터시트(HTML) 2 Page - Renesas Technology Corp

  HD74ACT107 Datasheet HTML 1Page - Renesas Technology Corp HD74ACT107 Datasheet HTML 2Page - Renesas Technology Corp HD74ACT107 Datasheet HTML 3Page - Renesas Technology Corp HD74ACT107 Datasheet HTML 4Page - Renesas Technology Corp HD74ACT107 Datasheet HTML 5Page - Renesas Technology Corp HD74ACT107 Datasheet HTML 6Page - Renesas Technology Corp HD74ACT107 Datasheet HTML 7Page - Renesas Technology Corp  
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HD74AC107/HD74ACT107
Rev.2.00, Jul.16.2004, page 2 of 6
Logic Symbol
1
J1
Q1
Q1
K1
CP1
CD1
J2
Q2
Q2
K2
CP2
CD2
38
9
11
2
6
5
12
4
13
10
VCC = Pin14
GND = Pin7
Pin Names
J
1, J2, K1, K2
Data Inputs
CP
1, CP2
Clock Pulse Inputs (Active Falling Edge)
C
D1, CD2
Direct Clear Inputs (Active Low)
Q
1, Q2, Q1, Q 2
Outputs
Truth Table
Inputs
Outputs
@ t
n
@ t
n + 1
JK
Q
LL
Qn
LH
L
HL
H
HH
Qn
H
:
High Voltage Level
L
:
Low Voltage Level
t
n
:
Bit time before clock pulse.
t
n + 1
:
Bit time after clock pulse.
Logic Diagram
CD
CP
CP
CP
CP
Q
Q
#CP
#CP
#CP
#CP
CP
CP
CP
J
K



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