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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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M35052 데이터시트(PDF) 2 Page - Renesas Technology Corp |
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M35052 데이터시트(HTML) 2 Page - Renesas Technology Corp |
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2 / 37 page  M35052-XXXSP/FP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS MITSUBISHI MICROCOMPUTERS DESCRIPTION The M35052-XXXSP/FP is TV screen display control IC which can be used to display information such as number of channels, the date and messages and program schedules on the TV screen. In particular, owing to the built-in SYNC-SEP (synchronous separa- tion) circuit, the synchronous correction circuit, the Decoder circuit, and to the Encoder circuit, external circuits can be decrease and character turbulence that occurs when superimposing can be reduced. The processor can conform to the EDS broadcast service and is suit- able for AV systems such as VTRs, LDs, and so on. It is a silicon gate CMOS process and M35052-XXXSP is housed in a 20-pin shrink DIP package, M35052-XXXFP is housed in a 20-pin shrink SOP package. For M35052-001SP/FP that is a standard ROM version of M35052- XXXSP/FP respectively, the character pattern is also mentioned. FEATURES • Screen composition .............................. 24 characters ✕ 10 lines, 32 characters ✕ 7 lines • Number of characters displayed .................................. 240 (Max.) • Character composition ..................................... 12 ✕ 18 dot matrix • Characters available ............................................. 128 characters • Character sizes available .................... 4 (horizontal) ✕ 4 (vertical) • Display locations available Horizontal direction ............................................... 240 locations Vertical direction ................................................... 256 locations • Blinking ................................................................. Character units Cycle : approximately 1 second, or approximately 0.5 seconds Duty : 25%, 50%, or 75% • Data input.............................. By the serial input function (16 bits) • Coloring Background coloring (composite video signal) • Blanking Total blanking (14 ✕ 18 dots) Border size blanking Character size blanking • Synchronizing signal Composite synchronizing signal generation (PAL, NTSC, M-PAL) • 2 output ports (1 digital line) • Oscillation stop function It is possible to stop the oscillation for synchronizing signal generation • Built-in half-tone display function • Built-in reversed character display function • Built-in Decoder (NTSC only) • Built-in Encoder (NTSC only) • Built-in synchronous correction circuit • Built-in synchronous separation circuit APPLICATION TV, VCR, Movie PIN CONFIGURATION (TOP VIEW) REV.1.2 CP1 TESTA CS SCK SIN AC VDD2 CVIDEO LECHA CVIN VDD1 HOR CP2 OSCIN VSS P1 P0 TESTB EDO VSS 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 CP1 TESTA CS SCK SIN AC VDD2 CVIDEO LECHA CVIN VDD1 HOR CP2 OSCIN VSS P1 P0 EDO VSS Outline 20P4B Outline 20P2Q-A TESTB 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 → → → → → ← ← ↔ → → → → ← ← → → → → → ← ← ↔ → → → → ← ← |
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