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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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H8S2245 데이터시트(PDF) 349 Page - Renesas Technology Corp |
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H8S2245 데이터시트(HTML) 349 Page - Renesas Technology Corp |
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349 / 818 page  Section 9 16-Bit Timer Pulse Unit (TPU) Rev.3.00 Mar. 26, 2007 Page 307 of 772 REJ09B0355-0300 9.2.4 Timer Interrupt Enable Register (TIER) 7 TTGE 0 R/W 6 — 1 — 5 — 0 — 4 TCIEV 0 R/W 3 TGIED 0 R/W 0 TGIEA 0 R/W 2 TGIEC 0 R/W 1 TGIEB 0 R/W Bit Initial value R/W : : : Channel 0: TIER0 7 TTGE 0 R/W 6 — 1 — 5 TCIEU 0 R/W 4 TCIEV 0 R/W 3 — 0 — 0 TGIEA 0 R/W 2 — 0 — 1 TGIEB 0 R/W Channel 1: TIER1 Channel 2: TIER2 Bit Initial value R/W : : : The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for each channel. The TPU has three TIER registers, one for each channel. The TIER registers are initialized to H'40 by a reset, and in hardware standby mode. Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D conversion start requests by TGRA input capture/compare match. Bit 7 TTGE Description 0 A/D conversion start request generation disabled (Initial value) 1 A/D conversion start request generation enabled Bit 6—Reserved: Read-only bit, always read as 1. |
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