H8S2245 datasheet(362/818 Pages) RENESAS

362 / 818 page

Section 9 16-Bit Timer Pulse Unit (TPU)

Rev.3.00 Mar. 26, 2007 Page 320 of 772

REJ09B0355-0300

Phase Counting Mode

In this mode, TCNT is incremented or decremented by detecting the phases of two clocks input

from the external clock input pins in channels 1, and 2. When phase counting mode is set, the

corresponding TCLK pin functions as the clock pin, and TCNT performs up- or down-counting.

This can be used for two-phase encoder pulse input.

9.4.2

Basic Functions

Counter Operation

When one of bits CST0 to CST2 is set to 1 in TSTR, the TCNT counter for the corresponding

channel starts counting. TCNT can operate as a free-running counter, periodic counter, and so on.

Example of count operation setting procedure: Figure 9.6 shows an example of the count

operation setting procedure.

Select counter clock

Operation selection

Select counter clearing source

Periodic counter

Set period

Start count operation

[1]

[2]

[4]

[3]

[5]

Free-running counter

Start count operation

<Free-running counter>

[5]

[1]

[2]

[3]

[4]

[5]

Select the counter

clock with bits

TPSC2 to TPSC0 in

TCR. At the same

time, select the

input clock edge

with bits CKEG1

and CKEG0 in

TCR.

For periodic counter

operation, select

the TGR to be used

as the TCNT

clearing source with

bits CCLR2 to

CCLR0 in TCR.

Designate the TGR

selected in [2] as an

output compare

of TIOR.

Set the periodic

counter cycle in the

TGR selected in [2].

Set the CST bit in

TSTR to 1 to start

the count operation.

Select output compare register

Figure 9.6 Example of Counter Operation Setting Procedure

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