H8S2245 datasheet(496/818 Pages) RENESAS

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Section 12 Serial Communication Interface (SCI)

Rev.3.00 Mar. 26, 2007 Page 454 of 772

REJ09B0355-0300

Clock

Either an internal clock generated by the on-chip baud rate generator or an external serial clock

input at the SCK pin can be selected, according to the setting of the C/

A bit in SMR and the CKE1

and CKE0 bits in SCR. For details of SCI clock source selection, see table 12.9.

When the SCI is operated on an internal clock, the serial clock is output from the SCK pin.

Eight serial clock pulses are output in the transfer of one character, and when no transfer is

performed the clock is fixed high. When only receive operations are performed, however, the

serial clock is output until an overrun error occurs or the RE bit is cleared to 0. If you want to

perform receive operations in units of one character, you should select an external clock as the

clock source.

Data Transfer Operations

SCI initialization (clocked synchronous mode): Before transmitting and receiving data, you

should first clear the TE and RE bits in SCR to 0, then initialize the SCI as described below.

When the operating mode, transfer format, etc., is changed, the TE and RE bits must be cleared to

0 before making the change using the following procedure. When the TE bit is cleared to 0, the

TDRE flag is set to 1 and TSR is initialized. Note that clearing the RE bit to 0 does not change the

contents of the RDRF, PER, FER, and ORER flags, or the contents of RDR.

Figure 12.15 shows a sample SCI initialization flowchart.

H8S2245 데이터시트(PDF) 496 Page - Renesas Technology Corp