H8S2245 datasheet(634/818 Pages) RENESAS

634 / 818 page

Section 19 Electrical Characteristics

Rev.3.00 Mar. 26, 2007 Page 592 of 772

REJ09B0355-0300

19.4.4

Timing of On-Chip Supporting Modules

Table 19.8 lists the timing of on-chip supporting modules.

Table 19.8

Timing of On-Chip Supporting Modules

Condition A: V

CC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, Vref = 2.7 V to AVCC,

SS = AVSS = 0 V, φ = 32 kHz to 10 MHz (I/O port, TMR, WDT),

φ = 2 to 10 MHz (TPU, SCI, A/D converter), T

a = –20 to +75°C (regular

specifications), T

a = –40 to +85°C (wide-range specifications)

Condition B: V

CC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, Vref = 2.7 V to AVCC,

SS = AVSS = 0 V, φ = 32 kHz to 13 MHz (I/O port, TMR, WDT),

φ = 2 to 13 MHz (TPU, SCI, A/D converter), T

a = –20 to +75°C (regular

specifications), T

a = –40 to +85°C (wide-range specifications)

Condition C: V

CC = 5.0 V ±10%, AVCC = 5.0 V ±10%, Vref = 4.5 V to AVCC,

SS = AVSS = 0 V, φ = 2 to 20 MHz, Ta = –20 to +75°C (regular specifications),

a = –40 to +85°C (wide-range specifications)

Condition A Condition B Condition C

Item

Symbol Min

Max

Min

Max

Min

Max

Unit

Test

Conditions

I/O

port

Output data delay

time

PWD

—

100

—

Figure

19.15

Input data setup

time

PRS

—

Input data hold

time

PRH

—

TPU

Timer output

delay time

TOCD

—

100

—

Figure

19.16

Timer input setup

time

TICS

—

Timer clock input

setup time

TCKS

—

Figure

19.17

Single

edge

TCKWH

1.5

—

1.5

—

1.5

—

cyc

Timer

clock

pulse

width

Both

edges

TCKWL

2.5

—

2.5

—

2.5

—

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