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H8S2245 데이터시트(PDF) 116 Page - Renesas Technology Corp

부품명 H8S2245
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S2245 데이터시트(HTML) 116 Page - Renesas Technology Corp

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Section 3 MCU Operating Modes
Rev.3.00 Mar. 26, 2007 Page 74 of 772
REJ09B0355-0300
Bit 6—Reserved: Read-only bit, always read as 0.
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select the control
mode of the interrupt controller. For details of the interrupt control modes, see section 5.4.1,
Interrupt Control Modes and Interrupt Operation.
Bit 5
Bit 4
INTM1
INTM0
Interrupt
Control Mode
Description
0
0
0
Control of interrupts by I bit
(Initial value)
1
1
Control of interrupts by I bit, U bit, and ICR
10
—
Setting prohibited
1
—
Setting prohibited
Bit 3—NMI Edge Select (NMIEG): Selects the valid edge of the NMI interrupt input.
Bit 3
NMIEG
Description
0
An interrupt is requested at the falling edge of NMI input
(Initial value)
1
An interrupt is requested at the rising edge of NMI input
Bits 2 and 1—Reserved: Read-only bits, always read as 0.
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized when the reset status is released. It is not initialized in software standby mode.
Bit 0
RAME
Description
0
On-chip RAM is disabled
1
On-chip RAM is enabled
(Initial value)
Note:
When the DTC is used, the RAME bit should not be cleared to 0.



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