H8S2245 datasheet(132/818 Pages) RENESAS

132 / 818 page

Section 3 MCU Operating Modes

Rev.3.00 Mar. 26, 2007 Page 90 of 772

REJ09B0355-0300

Modes 4 and 5

(advanced expanded modes

with on-chip ROM disabled)

Mode 6

(advanced expanded mode

with on-chip ROM enabled)

Mode 7

(advanced single-chip mode)

External address

space

On-chip ROM

Reserved area

On-chip RAM*2

Notes:

Internal I/O registers

On-chip ROM

External address

space

External address

space

On-chip RAM*2

Reserved area*2

On-chip RAM

Internal I/O registers

External address

space

External address

space

Internal I/O registers

External address

space

H'000000

H'01FFFF

H'020000

H'FFDC00

H'FFFBFF

H'FFFC00

H'FFFFFF

H'FFDC00

H'FFEC00

H'FFFBFF

H'FFFC00

H'FFFFFF

H'FFEC00

H'FFFBFF

H'FFFFFF

H'FFFF08

H'FFFE40

H'FFFF07

H'FFFF28

External address

space/reserved

area*1

H'FFFE3F

H'00FFFF

H'010000

H'007FFF

H'008000

When the EAE bit in BCRL is set to 1, this area is external address space. When the EAE

bit is cleared to 0, it is reserved.

External addresses can be accessed by clearing the RAME bit in SYSCR to 0.

Figure 3.6 H8S/2241 Memory Map in Each Operating Mode (cont)

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