H8SXSLASH1663 datasheet(519/1158 Pages) RENESAS

519 / 1158 page

Section 9 I/O Ports

Rev.1.00 Jun. 07, 2006 Page 467 of 1102

REJ09B0294-0100

9.2.9

Port D

(1) PD7/A7, PD6/A6, PD5/A5, PD4/A4, PD3/A3, PD2/A2, PD1/A1, PD0/A0

The pin function is switched as shown below according to the combination of operating mode, the

EXPE bit, and the PDnDDR bit settings.

Setting

I/O Port

Module Name

Pin Function

MCU Operating Mode

PDnDDR

On-chip ROM disabled extended mode



Bus controller

Address output

On-chip ROM enabled extended mode

PDn output

Single-chip mode*

I/O port

PDn input

(initial setting)

Modes other than on-chip ROM

disabled extended mode

[Legend]

0 to 7

Note:

Address output is enabled by setting PDnDDR = 1 in external extended mode

(EXPE = 1)

9.2.10

Port E

(1) PE7/A15, PE6/A14, PE5/A13, PE4/A12, PE3/A11, PE2/A10, PE1/A9, PE0/A8

The pin function is switched as shown below according to the combination of operating mode, the

EXPE bit, and the PEnDDR bit settings.

Setting

I/O Port

Module Name

Pin Function

MCU Operating Mode

PEnDDR

On-chip ROM disabled extended mode



Bus controller

Address output

On-chip ROM enabled extended mode

PEn output

Single-chip mode*

I/O port

PEn input

(initial setting)

Modes other than on-chip ROM

disabled extended mode

[Legend]

0 to 7

Note:

Address output is enabled by setting PDnDDR = 1 in external extended mode

(EXPE = 1)

H8SX/1663 데이터시트(PDF) 519 Page - Renesas Technology Corp

H8SX/1663 데이터시트(HTML) 519 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL